Specifications

• Logic Family: High-Speed CMOS (HC)
• Package Type: DIP-16
• Number of Bits: 4
• Counting Mode: Up/Down
• Inputs/Outputs:
  • 4 Output Lines (Q0 to Q3) for displaying the counter value
  • 1 Count Enable Input (CE) for enabling counting
  • 1 Up/Down Control Input (UP/DOWN) for selecting counting direction
  • 1 Load Input (LOAD) for loading a preset value
  • 4 Data Inputs (D0 to D3) for loading preset values
  • 1 Clear Input (CLR) for asynchronously resetting the counter
  • 1 Clock Input (CLK) for counting pulses
• Supply Voltage (VCC): Typically 2V to 6V
• Input Voltage (VIL, VIH):
  • Low-Level Input Voltage (VIL): Typically 0.3 * VCC
  • High-Level Input Voltage (VIH): Typically 0.7 * VCC
• Output Current:
  • High-Level Output Current (IOH): Typically ±20mA
  • Low-Level Output Current (IOL): Typically ±20mA
• Propagation Delay: Typically 10 ns (at VCC = 5V)
• Power Dissipation: Typically 1µA (static)